---

Pic 16F877 ile mp3 player


C kodu H dosyası

//////// Standard Header file for the PIC16C63 device ////////////////
#device PIC16F877

#nolist
//////// Program memory: 4096x14 Data RAM: 192 Stack: 8
//////// I/O: 22 Analog Pins: 0
//////// C Scratch area: 20 ID Location: 2000
//////// Fuses: LP,XT,HS,RC,NOWDT,WDT,NOPUT,PUT,PROTECT,PROTECT_75%
//////// Fuses: PROTECT_50%,NOPROTECT,NOBROWNOUT,BROWNOUT
////////
////////////////////////////////////////////////////////////////// I/O
// Discrete I/O Functions: SET_TRIS_x(), OUTPUT_x(), INPUT_x(),
// PORT_B_PULLUPS(), INPUT(),
// OUTPUT_LOW(), OUTPUT_HIGH(),
// OUTPUT_FLOAT(), OUTPUT_BIT()
// Constants used to identify pins in the above are:

#define PIN_A0 40
#define PIN_A1 41
#define PIN_A2 42
#define PIN_A3 43
#define PIN_A4 44
#define PIN_A5 45

#define PIN_B0 48
#define PIN_B1 49
#define PIN_B2 50
#define PIN_B3 51
#define PIN_B4 52
#define PIN_B5 53
#define PIN_B6 54
#define PIN_B7 55

#define PIN_C0 56
#define PIN_C1 57
#define PIN_C2 58
#define PIN_C3 59
#define PIN_C4 60
#define PIN_C5 61
#define PIN_C6 62
#define PIN_C7 63

//////////////////////raffy defs FOR 877
#byte option_reg=0x81


#define PIN_D0 64
#define PIN_D1 65
#define PIN_D2 66
#define PIN_D3 67
#define PIN_D4 68
#define PIN_D5 69
#define PIN_D6 70
#define PIN_D7 71

#define PIN_E0 72
#define PIN_E1 73
#define PIN_E2 74



//----------------------FOR UART
#byte SPBRG = 0x99
#byte TXREG = 0x19
#byte RCREG = 0x1A

#byte TXSTA = 0x98
#bit CSRC = 0x98.7
#bit TX9 = 0x98.6
#bit TXEN = 0x98.5
#bit SYNC = 0x98.4
//#bit--- = 0x98.3
#bit BRGH = 0x98.2
#bit TRMT = 0x98.1
#bit TX9D = 0x98.0

#byte RCSTA= 0x18
#bit SPEN = 0x18.7
#bit RX9 = 0x18.6
#bit SREN = 0x18.5
#bit CREN = 0x18.4
#bit ADDEN = 0x18.3
#bit FERR = 0x18.2
#bit OERR = 0x18.1
#bit RX9D = 0x18.0


//FOR SSP

#byte SSPBUF = 0X13
#byte SSPADD = 0X93

#byte SSPCON = 0X14
#bit WCOL = 0x14.7
#bit SSPOV = 0x14.6
#bit SSPEN = 0x14.5
#bit CKP = 0x14.4
#bit SSPM3 = 0x14.3
#bit SSPM2 = 0x14.2
#bit SSPM1 = 0x14.1
#bit SSPM0 = 0x14.0

#byte SSPCON2 = 0X91
#bit GKEN = 0x91.7
#bit ACKSTAT = 0x91.6
#bit ACKDT = 0x91.5
#bit ACKEN = 0x91.4
#bit RCEN = 0x91.3
#bit PEN = 0x91.2
#bit RSEN = 0x91.1
#bit SEN = 0x91.0

#byte SSPSTAT = 0X94
#bit SMP = 0x94.7
#bit CKE = 0x94.6
#bit DA = 0x94.5
#bit P = 0x94.4
#bit S = 0x94.3
#bit RW = 0x94.2
#bit UA = 0x94.1
#bit BF = 0x94.0


//FOR A/D

#byte ADCON0 = 0X1F
#byte ADCON1 = 0X9F

#byte ADRESH = 0X1E
#byte ADRESL = 0X9E



//end raffy defs FOR 877




////////////////////////////////////////////////////////////////// Useful defines
#define FALSE 0
#define TRUE 1

#define BYTE int
#define BOOLEAN short int

#define getc getch
#define getchar getch
#define putc putchar

////////////////////////////////////////////////////////////////// Control
// Control Functions: RESET_CPU(), SLEEP(), RESTART_CAUSE()
// Constants returned from RESTART_CAUSE() are:
#define WDT_FROM_SLEEP 0
#define WDT_TIMEOUT 8
#define MCLR_FROM_SLEEP 16
#define NORMAL_POWER_UP 24


////////////////////////////////////////////////////////////////// Timer 0
// Timer 0 (AKA RTCC)Functions: SETUP_COUNTERS() or SETUP_TIMER0(),
// SET_TIMER0() or SET_RTCC(),
// GET_TIMER0() or GET_RTCC()
// Constants used for SETUP_TIMER0() are:
#define RTCC_INTERNAL 0
#define RTCC_EXT_L_TO_H 32
#define RTCC_EXT_H_TO_L 48

#define RTCC_DIV_2 0
#define RTCC_DIV_4 1
#define RTCC_DIV_8 2
#define RTCC_DIV_16 3
#define RTCC_DIV_32 4
#define RTCC_DIV_64 5
#define RTCC_DIV_128 6
#define RTCC_DIV_256 7



// Constants used for SETUP_COUNTERS() are the above
// constants for the 1st param and the following for
// the 2nd param:

////////////////////////////////////////////////////////////////// WDT
// Watch Dog Timer Functions: SETUP_WDT() or SETUP_COUNTERS() (see above)
// RESTART_WDT()
//
#define WDT_18MS 8
#define WDT_36MS 9
#define WDT_72MS 10
#define WDT_144MS 11
#define WDT_288MS 12
#define WDT_576MS 13
#define WDT_1152MS 14
#define WDT_2304MS 15

////////////////////////////////////////////////////////////////// Timer 1
// Timer 1 Functions: SETUP_TIMER_1, GET_TIMER1, SET_TIMER1
// Constants used for SETUP_TIMER_1() are:
// (or (via |) together constants from each group)
#define T1_DISABLED 0
#define T1_INTERNAL 0x85
#define T1_EXTERNAL 0x87
#define T1_EXTERNAL_SYNC 0x83

#define T1_CLK_OUT 8

#define T1_DIV_BY_1 0
#define T1_DIV_BY_2 0x10
#define T1_DIV_BY_4 0x20
#define T1_DIV_BY_8 0x30

////////////////////////////////////////////////////////////////// Timer 2
// Timer 2 Functions: SETUP_TIMER_2, GET_TIMER2, SET_TIMER2
// Constants used for SETUP_TIMER_2() are:
#define T2_DISABLED 0
#define T2_DIV_BY_1 4
#define T2_DIV_BY_4 5
#define T2_DIV_BY_16 6

////////////////////////////////////////////////////////////////// CCP
// CCP Functions: SETUP_CCPx, SET_PWMx_DUTY
// CCP Variables: CCP_x, CCP_x_LOW, CCP_x_HIGH
// Constants used for SETUP_CCPx() are:
#define CCP_OFF 0
#define CCP_CAPTURE_FE 4
#define CCP_CAPTURE_RE 5
#define CCP_CAPTURE_DIV_4 6
#define CCP_CAPTURE_DIV_16 7
#define CCP_COMPARE_SET_ON_MATCH 8
#define CCP_COMPARE_CLR_ON_MATCH 9
#define CCP_COMPARE_INT 0xA
#define CCP_COMPARE_RESET_TIMER 0xB
#define CCP_PWM 0xC
#define CCP_PWM_PLUS_1 0x1c
#define CCP_PWM_PLUS_2 0x2c
#define CCP_PWM_PLUS_3 0x3c
long CCP_1;
#byte CCP_1 = 0x15
#byte CCP_1_LOW= 0x15
#byte CCP_1_HIGH= 0x16
long CCP_2;
#byte CCP_2 = 0x1B
#byte CCP_2_LOW= 0x1B
#byte CCP_2_HIGH= 0x1C

////////////////////////////////////////////////////////////////// SPI
// SPI Functions: SETUP_SPI, SPI_WRITE, SPI_READ, SPI_DATA_IN
// Constants used in SETUP_SSP() are:
#define SPI_MASTER 0x20
#define SPI_SLAVE 0x24
#define SPI_L_TO_H 0
#define SPI_H_TO_L 0x10
#define SPI_CLK_DIV_4 0
#define SPI_CLK_DIV_16 1
#define SPI_CLK_DIV_64 2
#define SPI_CLK_T2 3
#define SPI_SS_DISABLED 1

////////////////////////////////////////////////////////////////// INT
// Interrupt Functions: ENABLE_INTERRUPTS(), DISABLE_INTERRUPTS(),
// EXT_INT_EDGE()
//
// Constants used in EXT_INT_EDGE() are:
#define L_TO_H 0x40
#define H_TO_L 0
// Constants used in ENABLE/DISABLE_INTERRUPTS() are:
#define GLOBAL 0x0BC0
#define INT_RTCC 0x0B20
#define INT_RB 0x0B08
#define INT_EXT 0x0B10
#define INT_TBE 0x8C10
#define INT_RDA 0x8C20
#define INT_TIMER1 0x8C01
#define INT_TIMER2 0x8C02
#define INT_CCP1 0x8C04
#define INT_CCP2 0x8D01
#define INT_SSP 0x8C08

#list



Asembbley kodu

title "CompactFlash"
;
;
;
;
LIST P=16F877, R=DEC
; errorlevel 0,-305,-302*****
;******************************************************************************
;** **
;** COMPACTFLASH CARD TO PIC INTERFACE **
;** **
;** MARK A. SAMUELS **
;** **
;******************************************************************************
INCLUDE "e:\mp3playerJunk\mplab\P16F877.inc"

;*************************************************************************
;******************************************************************************


; Registers

__CONFIG _CP_OFF & _WDT_OFF & _XT_OSC & _PWRTE_ON & _LVP_OFF


; VARIABLE DECLARATIONS
;******************************************************************************
TEMP_W EQU 0x20
TEMP_S EQU 0x21
REGA EQU TEMP_S + 1
REGB EQU REGA + 1
REGC EQU REGB + 1
REGD EQU REGC + 1
REGE EQU REGD + 1
DATA_HI EQU REGE + 1
DATA_LO EQU DATA_HI + 1
COUNTER_LO EQU DATA_LO + 1
COUNTER_HI EQU COUNTER_LO + 1
SECTORS_LO EQU COUNTER_HI + 1
SECTORS_HI EQU SECTORS_LO + 1
BUFSIZE_LO EQU SECTORS_HI + 1
BUFSIZE_HI EQU BUFSIZE_LO + 1

regx EQU BUFSIZE_HI + 1
regy EQU regx + 1
regz EQU regy + 1
regt EQU regz + 1
regu EQU regt + 1
regv EQU regu + 1

rollerlo equ regv + 1
rollerhi equ rollerlo + 1
regnosub equ rollerhi + 1
bassboostbuffer equ regnosub + 1
volumebuffer equ bassboostbuffer + 1
bassslower equ volumebuffer + 1


; PORT DECLARATIONS
;******************************************************************************
CF_DATA EQU PORTD
CF_ADDR EQU PORTE
CF_CONTROL EQU PORTA

userport equ portb

; FLAG DECLARATIONS
;******************************************************************************
; CF CONTROL
CE1 EQU 0 ; CF CONTROL PORT, 0 (LOW = ENABLE, HI = HI-Z)
CD1 EQU 1 ; CF CONTROL PORT, 1
RESET EQU 2 ; CF CONTROL PORT, 2
OE EQU 3 ; CF CONTROL PORT, 3
WE EQU 4 ; CF CONTROL PORT, 4
RDY EQU 5 ; CF CONTROL PORT, 5



;these are port c, mostly

vscontrol equ portc

bsync equ 0
dreq equ 1
dclk equ 6
sdata equ 7

xcs equ 2
sclk equ 3
si equ 5
so equ 4



xreset equ 2 ;this is on port b!!!!

userreset equ 3
bassboost equ 4
volume equ 5
skipbutton equ 6
surround equ 7


; CF CARD REGISTER ADDRESSES
;******************************************************************************
; ADDRESS VALUES, LOW 3 BITS AS FOLLOWS:
; (X,X,X,X,X,A2,A1,A0)

DATA_REG EQU 0x00 ; ADDRESS OF DATA REGISTER
ERROR_REG EQU 0x01 ; ADDRESS OF ERROR REGISTER
FEATURES_REG EQU 0x01 ; ADDRESS OF FEATURES REGISTER
SEC_CNT_REG EQU 0x02 ; ADDRESS OF SECTOR COUNT REGISTER
SEC_NUM_REG EQU 0x03 ; ADDRESS OF SECTOR NUMBER REGISTER
CYL_LO_REG EQU 0x04 ; ADDRESS OF LOW CYLINDER REGISTER
CYL_HI_REG EQU 0x05 ; ADDRESS OF HIGH CYLINDER REGISTER
HEAD_REG EQU 0x06 ; ADDRESS OF HEAD/DRIVE REGISTER
STATUS_REG EQU 0x07 ; ADDRESS OF STATUS REGISTER
COMMAND_REG EQU 0x07 ; ADDRESS OF COMMAND REGISTER

; COMMAND ASSIGNMENTS
;******************************************************************************
; COMMAND VALUES, 8 BITS

IDENTIFY EQU 0xEC
WRITE_SEC EQU 0x30
READ_SEC EQU 0x20




PAGE

org 0
NOP
goto PRE_MAIN


org 4
goto Int
;******************************************************************************
;******************************************************************************
;** **
;** INTERRUPT SERVICE ROUTINE **
;** **
;******************************************************************************
;******************************************************************************
; (NO INTERRUPTS IN THIS CODE... ONLY HEADER AND FOOTER FOR ISR)

Int
movwf TEMP_W
swapf STATUS, w
movwf TEMP_S

; check int source here


goto End_of_Int


End_of_Int

swapf TEMP_S, w
movwf STATUS

swapf TEMP_W, f
swapf TEMP_W, w

retfie



;++++++++++++++++++++++++++++++++++++++++subroutines





;******************************************************************************
;* CHECK_READY SUBROUTINE *
;******************************************************************************
CHECK_READY
BTFSS CF_CONTROL,RDY ; CHECK IF CF READY
GOTO CHECK_READY
RETURN
;******************************************************************************
;* CF WRITE SUBROUTINE *
;******************************************************************************
CF_WRITE

; ENSURE CARD IS READY

CALL CHECK_READY
NOP

; STROBE "WE" LINE LOW

BCF CF_CONTROL, WE
NOP
NOP
NOP
BSF CF_CONTROL, WE
NOP

RETURN

;******************************************************************************
;* CF READ SUBROUTINE *
;******************************************************************************
CF_READ
; READ TWO BYTES

CALL CHECK_READY

; SET TRIS REGISTERS FOR DATA LINES TO INPUT

BSF STATUS, RP0
MOVLW 0xFF
MOVWF CF_DATA
BCF STATUS, RP0
NOP
CLRF CF_DATA

; SET OE LINE LOW
NOP
BCF CF_CONTROL, OE
NOP
NOP
NOP

; READ AND STORE BYTE #1
MOVF CF_DATA,W
MOVWF DATA_LO
NOP
; SET OE LINE HI
BSF CF_CONTROL, OE
NOP
NOP

CALL CHECK_READY

; BYTE #2

; SET OE LINE LOW
NOP
BCF CF_CONTROL, OE
NOP
NOP
NOP

;READ AND STORE BYTE #2
MOVF CF_DATA,W
MOVWF DATA_HI
NOP
; SET OE LINE HI
BSF CF_CONTROL, OE
NOP

; CHANGE CF_DATA BACK TO OUTPUT

BSF STATUS, RP0
CLRF CF_DATA
BCF STATUS, RP0
NOP

RETURN

;************************************************************************
;* ONE_SEC *
;* GENERATES ONE SECOND DELAY *
;************************************************************************
ONE_SEC
MOVLW .255
MOVWF REGD
GOTO ONE100

HALF_SEC
MOVLW .128
MOVWF REGD

ONE100
CALL DELAY

DECFSZ REGD,F
GOTO ONE100

RETURN

;******************************************************************************
;* DELAY SUBROUTINE *
;******************************************************************************
DELAY
MOVLW .2 ; # OF 1MS DELAYS
MOVWF REGB

DL100
CLRF REGC

DL200 ;------\
NOP ; \
; \
DECFSZ REGC,F ; > 1 MS (APPROX)
GOTO DL200 ; /
; /
DECFSZ REGB,F ;------/
GOTO DL100 ;


RETURN

;------------------------------------------------------------------------------
serial_delay
MOVLW .52
MOVWF REGy

Serial_byte_delay
DECFSZ REGy,F
GOTO Serial_byte_delay

RETURN

nop



;---------------------------------------------------------------------------




CFread_VSsend
; READ TWO BYTES

CALL CHECK_READY
BSF STATUS, RP0 ; SET TRIS REGISTERS FOR DATA LINES TO INPUT
MOVLW 0xFF
MOVWF CF_DATA
BCF STATUS, RP0

CLRF CF_DATA ;is this needed

BCF CF_CONTROL, OE ; SET OE LINE LOW
MOVF CF_DATA,W ; READ AND STORE BYTE #1
BSF CF_CONTROL, OE ; SET OE LINE HI
;bsf portb,4;-------------
;nop;------------------------
;nop;---------------------
;bcf portb,4;-------------
; movlw 0xf5
bsf vscontrol,bsync
movwf txreg
nop
nop
bcf vscontrol,bsync


CALL CHECK_READY
BCF CF_CONTROL, OE ; BYTE #2 ; SET OE LINE LOW
MOVF CF_DATA,W ;READ AND STORE BYTE #2
BSF CF_CONTROL, OE ; SET OE LINE HI

bsf vscontrol,bsync
movwf txreg
nop
nop
bcf vscontrol,bsync

BSF STATUS, RP0 ; CHANGE CF_DATA BACK TO OUTPUT
CLRF CF_DATA
BCF STATUS, RP0
RETURN





spiout
movwf sspbuf
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
return
;++++++++++++++++++++++++++++++++++++++++

sdi_out

bsf vscontrol,bsync
movwf txreg
nop
nop
bcf vscontrol,bsync
nop
nop
nop
nop
return


;+++++++++++++++++++++++++++++++++++++++++++
resetvs1001
;reset and mode set
bcf vscontrol,xcs
movlw 0x02
call spiout
movlw 0x00
call spiout
movlw 0x03
call spiout
movlw 0x04
call spiout
bsf vscontrol,xcs
call delay
;unreset and mode set
bcf vscontrol,xcs
movlw 0x02
call spiout
movlw 0x00
call spiout
movlw 0x03
call spiout
movlw 0x00
call spiout
bsf vscontrol,xcs
call delay

morezeroes
check_vs_a
BTFSS vscontrol,dreq ; CHECK IF vs1001 READY
GOTO CHECK_vs_a
movlw 0x00
call sdi_out
call sdi_out
call sdi_out
call sdi_out
decfsz regnosub
goto morezeroes

return




;+++++++++++++++++subroutines end

;*****************************************************************************
;*****************************************************************************
PRE_MAIN
;*****************************************************************************
;*****************************************************************************
; CLEAR MEMORY SPACE (SET ALL RAM VALUES TO 0x00)
GOTO INIT_DONE


INIT_DONE

; Setup

BSF STATUS, RP0 ; Goto Bank 1

MOVLW 0x00

MOVWF TRISA ; Set RC(7:0) as outputs
MOVWF TRISD ; Set RD(7:0) as outputs
MOVWF TRISE ; Set RE(2:0) as outputs

MOVLW 0xd2 ;1101 0010b
MOVWF TRISC ;
MOVLW 0xfb ;iiii ioii
MOVWF TRISB ; bit 2 must be output for vs reset pin



BSF CF_CONTROL,CD1 ; MAKE CD1 AN INPUT (CARD DETECT)
BSF CF_CONTROL,RDY ; MAKE RDY AN INPUT (RDY/BSY)

MOVLW 0x06 ; Set PORTA as digital I/O
MOVWF ADCON1

MOVLW 0x00 ;
MOVWF OPTION_REG

BCF STATUS, RP0 ; Go back to Bank 0
MOVLW 0x00
MOVWF ADCON0


;**********************************************************************
;**********************************************************************
MAIN
;**********************************************************************
;**********************************************************************
bcf portb,4
bsf vscontrol,xcs ;chip select off sci (active low)
bcf portb,xreset ;reset vs1001


MOVLW 0x18
MOVWF CF_CONTROL

MOVLW 0x00
MOVWF CF_ADDR

bsf portb,xreset ;activate vs1001

;ooooooooooooooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
;usart_setup ;synchronous, max speed

bsf rcsta,spen
bsf status,rp0
movlw .0
movwf spbrg
;bsf txsta,brgh
bsf txsta,sync
bcf txsta,tx9
bsf txsta,csrc
bsf txsta,txen
bcf status,rp0
call One_sec
;spi setup
bsf status,rp0
bsf sspstat,cke
bcf status,rp0
bsf sspcon,sspen ;enable port

;initialize vs1001


;set volume

bcf vscontrol,xcs
movlw 0x02
call spiout
movlw 0x0b
call spiout
movlw 0x25
call spiout
movlw 0x25
call spiout
movwf volumebuffer
bsf vscontrol,xcs
call delay

;ooooooooooooooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
CHK_CARD
BTFSC CF_CONTROL, CD1 ; CARD INSERTED?
GOTO CHK_CARD ; NO, GO BACK
; YES, GO ON

BSF CF_CONTROL, RESET ; RESET CF CARD
NOP
NOP
BCF CF_CONTROL, RESET
NOP
NOP
CALL HALF_SEC
; WRITE CF EXECUTE IDENTIFY DRIVE COMMAND (0xEC)

MOVLW COMMAND_REG ; REGISTER TO BE ADRESSED
MOVWF CF_ADDR
MOVLW IDENTIFY ; INSTRUCTION CODE
MOVWF CF_DATA
CALL CF_WRITE
; READ DATA REGISTER
MOVLW READ_SEC
MOVWF CF_ADDR

MOVLW .5 ; DROP FIRST 5 WORDS
MOVWF REGA
TRUNC1
CALL CF_READ
DECFSZ REGA,F
GOTO TRUNC1
; READ AND STORE THE NUMBER OF BYTES PER SECTOR
CALL CF_READ
MOVLW .15 ; SKIP NEXT 15 WORDS
MOVWF REGA
TRUNC2
CALL CF_READ
DECFSZ REGA,F
GOTO TRUNC2
; READ AND STORE THE BUFFER SIZE
CALL CF_READ
MOVF DATA_HI, W
MOVWF BUFSIZE_HI
MOVF DATA_LO, W
MOVWF BUFSIZE_LO


MOVLW 0x00
MOVWF regv
MOVLW 0x02
MOVWF regu
MOVLW 0x2B
MOVWF regt

call resetvs1001
;+__+_+_++_+__+_+_+_+_++_
;+_+_++__+_+_++_+____+_+

superread


btfsc userport,userreset
goto skipuserreset
call resetvs1001
skipuserreset


btfsc userport,volume
goto skipvolume
decf volumebuffer,f
bcf vscontrol,xcs
movlw 0x02
call spiout
movlw 0x0b
call spiout
movf volumebuffer,w
call spiout
movf volumebuffer,w
call spiout
bsf vscontrol,xcs
skipvolume

btfsc userport,bassboost
goto skipbassboost
bcf vscontrol,xcs
movlw 0x02
call spiout
movlw 0x00
call spiout
movlw 0x03
call spiout
movlw 0x80
call spiout
bsf vscontrol,xcs
skipbassboost

btfsc userport,surround
goto skipsurround
bcf vscontrol,xcs
movlw 0x02
call spiout
movlw 0x00
call spiout
movlw 0x03
call spiout
movlw 0x01
call spiout
bsf vscontrol,xcs
skipsurround

btfsc userport,skipbutton
goto notrackskip
movlw 0x04
addwf regt,F
BTFSC STATUS,Z
INCF regu,F
BTFSC STATUS,Z
INCF regv,F
notrackskip



MOVLW 0xE0
MOVWF CF_DATA
MOVLW HEAD_REG
MOVWF CF_ADDR
CALL CF_WRITE

movf regv ,w
MOVWF CF_DATA
MOVLW CYL_HI_REG
MOVWF CF_ADDR
CALL CF_WRITE

movf regu ,w
MOVWF CF_DATA
MOVLW CYL_LO_REG
MOVWF CF_ADDR
CALL CF_WRITE

movf regt ,w
MOVWF CF_DATA
MOVLW SEC_NUM_REG
MOVWF CF_ADDR
CALL CF_WRITE

MOVLW 0x01
MOVWF CF_DATA
MOVLW SEC_CNT_REG
MOVWF CF_ADDR
CALL CF_WRITE

MOVLW READ_SEC
MOVWF CF_DATA
MOVLW COMMAND_REG
MOVWF CF_ADDR
CALL CF_WRITE


MOVLW DATA_REG
MOVWF CF_ADDR

movlw .16
movwf regx
printout
CHECK_vs
BTFSS vscontrol,dreq ; CHECK IF vs1001 READY
GOTO CHECK_vs

CALL CFREAD_vssend
CALL CFREAD_vssend
CALL CFREAD_vssend
CALL CFREAD_vssend
CALL CFREAD_vssend
CALL CFREAD_vssend
CALL CFREAD_vssend
CALL CFREAD_vssend
CALL CFREAD_vssend
CALL CFREAD_vssend
CALL CFREAD_vssend
CALL CFREAD_vssend
CALL CFREAD_vssend
CALL CFREAD_vssend
CALL CFREAD_vssend
CALL CFREAD_vssend

DECFSZ REGX, F
GOTO printout

; INCREMENT COUNTER
INCF regt,F
BTFSC STATUS,Z
INCF regu,F
BTFSC STATUS,Z
INCF regv,F
BTFSC STATUS,Z
goto end_chk
GOTO superread


; LOOP FOREVER UNTIL CARD REMOVED, THEN RESET
END_CHK

BTFSC CF_CONTROL,CD1
GOTO CHK_CARD
GOTO END_CHK

; END OF MAIN LOOP
retlw 'a'
retlw 'z'
retlw 'z'
retlw 'h'
retlw 'o'
end




16f877 Include Dosyası

LIST
; P16F877.INC Standard Header File, Version 1.00 Microchip Technology, Inc.
NOLIST

; This header file defines configurations, registers, and other useful bits of
; information for the PIC16F877 microcontroller. These names are taken to match
; the data sheets as closely as possible.

; Note that the processor must be selected before this file is
; included. The processor may be selected the following ways:

; 1. Command line switch:
; C:\ MPASM MYFILE.ASM /PIC16F877
; 2. LIST directive in the source file
; LIST P=PIC16F877
; 3. Processor Type entry in the MPASM full-screen interface

;==========================================================================
;
; Revision History
;
;==========================================================================

;Rev: Date: Reason:

;1.12 01/12/00 Changed some bit names, a register name, configuration bits
; to match datasheet (DS30292B)
;1.00 08/07/98 Initial Release

;==========================================================================
;
; Verify Processor
;
;==========================================================================

IFNDEF __16F877
MESSG "Processor-header file mismatch. Verify selected processor."
ENDIF

;==========================================================================
;
; Register Definitions
;
;==========================================================================

W EQU H'0000'
F EQU H'0001'

;----- Register Files------------------------------------------------------

INDF EQU H'0000'
TMR0 EQU H'0001'
PCL EQU H'0002'
STATUS EQU H'0003'
FSR EQU H'0004'
PORTA EQU H'0005'
PORTB EQU H'0006'
PORTC EQU H'0007'
PORTD EQU H'0008'
PORTE EQU H'0009'
PCLATH EQU H'000A'
INTCON EQU H'000B'
PIR1 EQU H'000C'
PIR2 EQU H'000D'
TMR1L EQU H'000E'
TMR1H EQU H'000F'
T1CON EQU H'0010'
TMR2 EQU H'0011'
T2CON EQU H'0012'
SSPBUF EQU H'0013'
SSPCON EQU H'0014'
CCPR1L EQU H'0015'
CCPR1H EQU H'0016'
CCP1CON EQU H'0017'
RCSTA EQU H'0018'
TXREG EQU H'0019'
RCREG EQU H'001A'
CCPR2L EQU H'001B'
CCPR2H EQU H'001C'
CCP2CON EQU H'001D'
ADRESH EQU H'001E'
ADCON0 EQU H'001F'

OPTION_REG EQU H'0081'
TRISA EQU H'0085'
TRISB EQU H'0086'
TRISC EQU H'0087'
TRISD EQU H'0088'
TRISE EQU H'0089'
PIE1 EQU H'008C'
PIE2 EQU H'008D'
PCON EQU H'008E'
SSPCON2 EQU H'0091'
PR2 EQU H'0092'
SSPADD EQU H'0093'
SSPSTAT EQU H'0094'
TXSTA EQU H'0098'
SPBRG EQU H'0099'
ADRESL EQU H'009E'
ADCON1 EQU H'009F'

EEDATA EQU H'010C'
EEADR EQU H'010D'
EEDATH EQU H'010E'
EEADRH EQU H'010F'

EECON1 EQU H'018C'
EECON2 EQU H'018D'

;----- STATUS Bits --------------------------------------------------------

IRP EQU H'0007'
RP1 EQU H'0006'
RP0 EQU H'0005'
NOT_TO EQU H'0004'
NOT_PD EQU H'0003'
Z EQU H'0002'
DC EQU H'0001'
C EQU H'0000'

;----- INTCON Bits --------------------------------------------------------

GIE EQU H'0007'
PEIE EQU H'0006'
T0IE EQU H'0005'
INTE EQU H'0004'
RBIE EQU H'0003'
T0IF EQU H'0002'
INTF EQU H'0001'
RBIF EQU H'0000'

;----- PIR1 Bits ----------------------------------------------------------

PSPIF EQU H'0007'
ADIF EQU H'0006'
RCIF EQU H'0005'
TXIF EQU H'0004'
SSPIF EQU H'0003'
CCP1IF EQU H'0002'
TMR2IF EQU H'0001'
TMR1IF EQU H'0000'

;----- PIR2 Bits ----------------------------------------------------------

EEIF EQU H'0004'
BCLIF EQU H'0003'
CCP2IF EQU H'0000'

;----- T1CON Bits ---------------------------------------------------------

T1CKPS1 EQU H'0005'
T1CKPS0 EQU H'0004'
T1OSCEN EQU H'0003'
NOT_T1SYNC EQU H'0002'
T1INSYNC EQU H'0002' ; Backward compatibility only
T1SYNC EQU H'0002'
TMR1CS EQU H'0001'
TMR1ON EQU H'0000'

;----- T2CON Bits ---------------------------------------------------------

TOUTPS3 EQU H'0006'
TOUTPS2 EQU H'0005'
TOUTPS1 EQU H'0004'
TOUTPS0 EQU H'0003'
TMR2ON EQU H'0002'
T2CKPS1 EQU H'0001'
T2CKPS0 EQU H'0000'

;----- SSPCON Bits --------------------------------------------------------

WCOL EQU H'0007'
SSPOV EQU H'0006'
SSPEN EQU H'0005'
CKP EQU H'0004'
SSPM3 EQU H'0003'
SSPM2 EQU H'0002'
SSPM1 EQU H'0001'
SSPM0 EQU H'0000'

;----- CCP1CON Bits -------------------------------------------------------

CCP1X EQU H'0005'
CCP1Y EQU H'0004'
CCP1M3 EQU H'0003'
CCP1M2 EQU H'0002'
CCP1M1 EQU H'0001'
CCP1M0 EQU H'0000'

;----- RCSTA Bits ---------------------------------------------------------

SPEN EQU H'0007'
RX9 EQU H'0006'
RC9 EQU H'0006' ; Backward compatibility only
NOT_RC8 EQU H'0006' ; Backward compatibility only
RC8_9 EQU H'0006' ; Backward compatibility only
SREN EQU H'0005'
CREN EQU H'0004'
ADDEN EQU H'0003'
FERR EQU H'0002'
OERR EQU H'0001'
RX9D EQU H'0000'
RCD8 EQU H'0000' ; Backward compatibility only

;----- CCP2CON Bits -------------------------------------------------------

CCP2X EQU H'0005'
CCP2Y EQU H'0004'
CCP2M3 EQU H'0003'
CCP2M2 EQU H'0002'
CCP2M1 EQU H'0001'
CCP2M0 EQU H'0000'

;----- ADCON0 Bits --------------------------------------------------------

ADCS1 EQU H'0007'
ADCS0 EQU H'0006'
CHS2 EQU H'0005'
CHS1 EQU H'0004'
CHS0 EQU H'0003'
GO EQU H'0002'
NOT_DONE EQU H'0002'
GO_DONE EQU H'0002'
ADON EQU H'0000'

;----- OPTION_REG Bits -----------------------------------------------------

NOT_RBPU EQU H'0007'
INTEDG EQU H'0006'
T0CS EQU H'0005'
T0SE EQU H'0004'
PSA EQU H'0003'
PS2 EQU H'0002'
PS1 EQU H'0001'
PS0 EQU H'0000'

;----- TRISE Bits ---------------------------------------------------------

IBF EQU H'0007'
OBF EQU H'0006'
IBOV EQU H'0005'
PSPMODE EQU H'0004'
TRISE2 EQU H'0002'
TRISE1 EQU H'0001'
TRISE0 EQU H'0000'

;----- PIE1 Bits ----------------------------------------------------------

PSPIE EQU H'0007'
ADIE EQU H'0006'
RCIE EQU H'0005'
TXIE EQU H'0004'
SSPIE EQU H'0003'
CCP1IE EQU H'0002'
TMR2IE EQU H'0001'
TMR1IE EQU H'0000'

;----- PIE2 Bits ----------------------------------------------------------

EEIE EQU H'0004'
BCLIE EQU H'0003'
CCP2IE EQU H'0000'

;----- PCON Bits ----------------------------------------------------------

NOT_POR EQU H'0001'
NOT_BO EQU H'0000'
NOT_BOR EQU H'0000'

;----- SSPCON2 Bits --------------------------------------------------------

GCEN EQU H'0007'
ACKSTAT EQU H'0006'
ACKDT EQU H'0005'
ACKEN EQU H'0004'
RCEN EQU H'0003'
PEN EQU H'0002'
RSEN EQU H'0001'
SEN EQU H'0000'

;----- SSPSTAT Bits -------------------------------------------------------

SMP EQU H'0007'
CKE EQU H'0006'
D EQU H'0005'
I2C_DATA EQU H'0005'
NOT_A EQU H'0005'
NOT_ADDRESS EQU H'0005'
D_A EQU H'0005'
DATA_ADDRESS EQU H'0005'
P EQU H'0004'
I2C_STOP EQU H'0004'
S EQU H'0003'
I2C_START EQU H'0003'
R EQU H'0002'
I2C_READ EQU H'0002'
NOT_W EQU H'0002'
NOT_WRITE EQU H'0002'
R_W EQU H'0002'
READ_WRITE EQU H'0002'
UA EQU H'0001'
BF EQU H'0000'

;----- TXSTA Bits ---------------------------------------------------------

CSRC EQU H'0007'
TX9 EQU H'0006'
NOT_TX8 EQU H'0006' ; Backward compatibility only
TX8_9 EQU H'0006' ; Backward compatibility only
TXEN EQU H'0005'
SYNC EQU H'0004'
BRGH EQU H'0002'
TRMT EQU H'0001'
TX9D EQU H'0000'
TXD8 EQU H'0000' ; Backward compatibility only

;----- ADCON1 Bits --------------------------------------------------------

ADFM EQU H'0007'
PCFG3 EQU H'0003'
PCFG2 EQU H'0002'
PCFG1 EQU H'0001'
PCFG0 EQU H'0000'

;----- EECON1 Bits --------------------------------------------------------

EEPGD EQU H'0007'
WRERR EQU H'0003'
WREN EQU H'0002'
WR EQU H'0001'
RD EQU H'0000'

;==========================================================================
;
; RAM Definition
;
;==========================================================================

__MAXRAM H'1FF'
__BADRAM H'8F'-H'90', H'95'-H'97', H'9A'-H'9D'
__BADRAM H'105', H'107'-H'109'
__BADRAM H'185', H'187'-H'189', H'18E'-H'18F'

;==========================================================================
;
; Configuration Bits
;
;==========================================================================

_CP_ALL EQU H'0FCF'
_CP_HALF EQU H'1FDF'
_CP_UPPER_256 EQU H'2FEF'
_CP_OFF EQU H'3FFF'
_DEBUG_ON EQU H'37FF'
_DEBUG_OFF EQU H'3FFF'
_WRT_ENABLE_ON EQU H'3FFF'
_WRT_ENABLE_OFF EQU H'3DFF'
_CPD_ON EQU H'3EFF'
_CPD_OFF EQU H'3FFF'
_LVP_ON EQU H'3FFF'
_LVP_OFF EQU H'3F7F'
_BODEN_ON EQU H'3FFF'
_BODEN_OFF EQU H'3FBF'
_PWRTE_OFF EQU H'3FFF'
_PWRTE_ON EQU H'3FF7'
_WDT_ON EQU H'3FFF'
_WDT_OFF EQU H'3FFB'
_LP_OSC EQU H'3FFC'
_XT_OSC EQU H'3FFD'
_HS_OSC EQU H'3FFE'
_RC_OSC EQU H'3FFF'

LIST



Devre Şeması
">

Eagle Pcb
http://www.walrus.com/~raphael/mp3/mp3.pcb
http://www.walrus.com/~raphael/mp3/eagl...3power.brd
http://www.walrus.com/~raphael/mp3/eagl...3power.sch
http://www.walrus.com/~raphael/mp3/eagl...er4mp3.brd
http://www.walrus.com/~raphael/mp3/eagl...r4mp31.sch

Parça Yerleşimi
">

">

Fotolar
">

">

">

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çok teşekkürler en kısa zamanda yapmaya çakışıcam

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Başa dön

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Şemadan gördüğüm kadarıyla CF karttan okuma yapılıyor. Deneyen arkadaşlardan bilgi almak isteriz

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Başa dön

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vs1001 entegresini piyasada bulabilen var mı?

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Başa dön

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çok güzel. emeğine sağlık.

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Başa dön

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hex dosyasına ceviremedim ceviripte kayar mısın? teşekkürler

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Başa dön